7476 Dual Master-Slave J-K Flip-Flop Logic IC

The 7476 is a TTL logic IC that integrates two independent master-slave J-K flip-flops in a single package.
Each flip-flop supports synchronous J-K operation with asynchronous preset and clear inputs.
The device operates from a single 5 V supply and is compatible with standard TTL logic levels.
Its master-slave architecture prevents race conditions during clock transitions.
Typical applications include counters, control logic, frequency division, and digital sequencing systems.

• Dual J-K Flip-Flop Architecture providing two independent flip-flops

• Master-Slave Configuration preventing race conditions

• Asynchronous Preset and Clear Inputs for immediate state control

• TTL Logic Family compatible with standard TTL levels

• Edge-Controlled Clock Inputs for synchronous operation

• Through-Hole DIP Package for breadboard and PCB use

• Model | 7476

• Device Type | Dual Master-Slave J-K Flip-Flop IC

• Logic Family | TTL

• Number of Flip-Flops | 2

• Trigger Type | Clock-Controlled (Master-Slave)

• Control Inputs | Preset, Clear (Asynchronous)

• Supply Voltage | 5 V

• Maximum Clock Frequency | 25 MHz

• Propagation Delay (Typical) | 25 ns

• Power Consumption (Typical) | 45 mW

• Operating Temperature Range | 0 °C to 70 °C

• Package Type | 16-Pin DIP

• 3D Model
• Datasheet